Intel Corp. and Micron Technology Inc. have reclaimed the process technology lead in NAND flash by rolling out 25nm devices.
The first 25nm NAND device is a multi-level-cell (MLC), 8Gbyte device, which is said to reduce IC count by 50 percent over previous products. With the device, measuring 167mm sup2;, the Intel-Micron duo will retake the NAND process lead over the SanDisk-Toshiba duo and Samsung Electronics Co. Ltd, which have recently announced 32nm and 30nm products, respectively. Another player, Hynix Semiconductor Inc., has a 26nm device waiting in the wings.
The 25nm product announcement was supposedly embargoed for Feb. 1, but one analyst leaked the details Jan. 29.
The 25nm device is made at IM Flash Technologies LLC, a joint NAND fab venture between Intel and Micron. Intel and Micron will initially ramp the 25nm NAND device at IM Flash, followed by production within Micron's fab in Manassas, Va. Still to be seen, however, is when IM Flash will restart its delayed NAND fab in Singapore. Some analysts say that fab will ramp in 2011.
During a fab tour and press event at IM Flash, the companies provided some clues to a major question: How did the Intel-Micron duo defy the laws of physics and push the technology down to 25nm?
In theory, today's 193nm immersion scanners supposedly hit the wall around 35nm. IM Flash has been able to devise 25nm NAND chips with today's 193nm immersion lithography, plus self-aligned double-patterning (SADP) techniques, observers speculated. It is widely believed that IM Flash is using scanners from ASML Holdings NV and SADP technology, observers speculated.
IM Flash may also be using a form of phase-shift mask technology. With the chip industry staying on Moore's Law and lithography stuck at the 193nm wavelength, chipmakers are looking to double-patterning to drive linewidth shrinks, according to a recent report from Barclays Capital.
SADP is the technology of choice in NAND, with all players adopting SADP at the 32nm node. In our view, SADP was really the only choice due to (i) inadequate overlay and line edge roughness capabilities of the then existing litho tools, (ii) the simple nature of NAND 1-D structure, and (iii) availability of excess etch and CVD tool capacity, according to the report.
Looking to the 22nm node, our checks suggest that SADP is the preferred option for all the major NAND manufacturers as development is already underway and litho tools by themselves alone are not yet ready to satisfy the requirements at 22nm, according to the report.
SADP is a costly but required process. With only one critical litho step, the method solves overlay as no alignment adjustment is necessary. Only one critical litho step means that the overlay requirement is not important, and is no longer applicable as a deciding factor. SADP involves the use of two critical etches and the use of CVD to deposit a spacer film and hard-mask, it added.
Intel and Micron declined to elaborate on its 25nm manufacturing recipe, but they hailed the new announcement as a major achievement. The 25nm device propels us in a pretty good lead in NAND process technology, said Rod Morgan, IM Flash's co-executive officer, at the event.
IM Flash started production with a 50nm process in 2006, followed by a 34nm process in 2008. With today's 25nm process, the companies are extending their process leadership, added Tom Rampone, VP and general manager of Intel's NAND solutions group. This will also help speed the adoption of solid-state drive (SSD) solutions for computing, he said. Intel is among a plethora of companies selling SSDs, based on NAND.
SSDs are among the applications for NAND flash. The 25nm NAND device will also reduce the costs for MP3 players, MCPs for cell phones and other products, said Brian Shirley, vice president of Micron's memory group. It could also enable new and low-cost tablet PCs. Apple Inc.'s new tablet, dubbed the iPad, makes use of NAND.
The introduction of the 25nm device also comes at the right time, as the NAND market appears to be recovering, he said. Demand is picking up, he added.
There is even talk about shortages in 2010. Gartner Inc. maintains that prices are likely to remain stable in the coming months before briefly softening during the second quarter and experiencing substantial shortages in the second half of the year.
The worldwide NAND market is expected to hit $18.807 billion in 2010, up from $15.416 billion in 2009, according to IC Insights Inc. The overall IC market is expected to hit $270.7 billion in 2010, up 15 percent over 2009, according to the firm. In 2009, the IC market hit $235.4 billion, down 10 percent.
Meanwhile, for consumer electronics manufacturers, the 25nm device from the Intel-Micron duo provides the highest-density in a single two-bits-per-cell MLC die that will fit an industry-standard, TSOP. Multiple 8Gbyte devices can be stacked in a package to increase storage capacity.
For example, a 256Gbyte SSD can now be enabled with just 32 of these devices (versus 64 previously), a 32Gbyte smart phone needs just four, and a 16Gbyte flash card requires only two. The 25nm, 8Gbyte device is sampling now and is expected to enter mass production in Q2 10.
NAND race heats up
In some respects, the product was expected. During a conference call last month, Micron said that it will be shortly sampling a 2xnm NAND device. It did not specify the exact node, but some expect the company will disclose more details in early 2010.
For some time, the Intel-Micron duo had the lead in the NAND process race. The companies have been shipping product based on a 34nm process.
Then, in April, Japan's Toshiba grabbed the lead. The company has been accelerating the ramp of its NAND flash memory products, based on its long-awaited, 32nm process technology.
In August, the 3bit-per-cell (x3) NAND race began to heat up, as Intel and Micron officially announced their initial offering in the arena. The x3, MLC NAND technology is based on a 34nm process.
Recently, South Korea's Samsung said it has begun volume production of 3bit, MLC NAND flash chips using a 30nm manufacturing process technology. The chips are a 4Gbit array with 3bits per memory cell providing a memory capacity of 32Gbit.
Korea's Hynix is shipping 41nm NAND designs, but it is also moving to take the lead. In its (recent) earnings call, Hynix recently reiterated optimism in the NAND industry and its pursuit to regain its position through an aggressive transition to 32nm and pulling in its transition to 26nm, according to a report from Gartner.
After a tumultuous 2009, in which Hynix witnessed negative bit growth, the company now appears poised to reach more than 100 percent bit growth in 2010—if it can successfully execute on its process geometry transition and M11 fab expansion, the report said.
In terms of market share, Samsung is still leading in NAND flash, but Toshiba is gaining ground, according to the new third-quarter rankings from iSuppli Corp. In the NAND rankings, Hynix was third, followed by Micron, Intel and Numonyx.
In any case, there's good news for all vendors. As we head into 2010, the memory market is recovering quite nicely even with the residuals from the 'great recession' still reminding us to tread lightly, according to Web-Feet Research.
IC Insights believes the flash memory market is about to undergo a dramatic shift in the supply—demand balance—one that will greatly favor IC suppliers. Demand for flash units continues to rise. At the same time, there has been a severe reduction in flash memory capital spending.
Capital spending for NAND flash memory fell to $3.5 billion in 2009, a 68 percent decline on the year, according to the firm.
In a report, IC Insights said it believes that flash capital spending, though nearly doubling in 2010, will still be well below what is necessary to keep pace with global demand. With unit demand increasing and a minimal amount of new facilities and upgrades planned, conditions are setting up for average selling prices to move higher for the next several years. This market trend could be a burden to OEMs, but a blessing to flash suppliers who have seen only steep price declines the past several years.
- Mark LaPedus